STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, announced that a team of ST and CEA-Leti researchers has received the 2012 Général Ferrié Award.
Considered to be the highest award in electronics R&D in France, the annual award honors an engineer or a scientific team whose work has made a significant contribution to the progress of electronics and its applications.
The team members are Claire Fenouillet-Béranger and Olivier Faynot from Leti, and Stéphane Monfray and Frédéric Bœuf from ST. They were honored for their work on FDSOI technology, which was a major technological breakthrough in the pursuit of miniaturization of electronic circuits.
Since the beginning of the 1970’s, the chip industry’s efforts to meet growing demand for computing power has followed Moore’s Law, which states that the number of transistors on integrated circuits doubles approximately every two years.
However, the industry today faces a major constraint: the growing difficulty to industrially control the electric behavior of transistors once their size shrinks below 100nm. Work begun around the turn of the century by the advanced-modules teams at ST and Leti has made it possible to quantify the improvement that new methods bring to conventional transistor performance.
Over time, the idea of making transistors on a substrate of ultra-thin silicon resting on an insulator was developed. The result was Fully Depleted Silicon-On-Insulator (FDSOI).
This planar technology uses manufacturing processes that are already in place for conventional technologies, as opposed to FinFET, aka 3-D transistors.
In fact, the four researchers not only were able to validate the technological choice for FDSOI, but also to enable the industrialization. They identified three key advantages to this approach:
- The production process is very close to that used in existing standard technologies (“Bulk” for silicon monocrystalline substrates)
- The transfer of circuit designs from bulk to FDSOI technology is significantly easier than with FinFET, because it stays on a planar geometry
- This technology is very attractive for mobile applications such as smartphones and tablets, which simultaneously require high performance and low power consumption
“This award acknowledges more than 20 years of Leti’s R&D work on SOI,” said Laurent Malier, CEO of Leti. “Leti is very proud to have succeeded in pushing this technology through to the industrial level and to have made it an excellent candidate for components that are being integrated into mobile devices for the excellent compromise they allow between speed and power consumption.”
Thomas Skotnicki, director advanced devices, ST and IEEE Fellow, said, “The perseverance and quality in the work of Claire, Frédéric, Olivier and Stéphane, at the heart of the advanced-component teams, demonstrated different transistor concepts for thin-film and overcame all obstacles to industrialization.”
ST Executive Vice President Joël Hartmann, head of front-end manufacturing and process R&D, Digital Sector, added: “In an industry of fierce global competition striving to continually miniaturize components, I am particularly proud to see this long cooperation between CEA and ST rewarded.”
The Dec. 3 awards ceremony was presided over by Paul Friedel, president of SEE (Société de l’Electricité, de l’Electronique et des Technologies de l’Information et la Communication) and Erich Spitz of the Academy of Sciences and the Academy of Technologies, and president of the Committee for Awards and Distinctions.
The award also honors the memory of Gustave-Auguste Ferrié (1868-1932), who was an engineer, French general, and pioneer in radio diffusion. He was responsible for the installation of the radio-emitting station on the Eiffel Tower in 1904. In 1917, his devices enabled the interception of messages from accused spy Mata Hari and helped end her espionage activities.
Source: http://www.leti.fr/