Interfacing Encoders – A Guide to Understanding Binary Words

Celera Motion provides smart programmable encoder systems - the Mercury™ 3000Si, 3500Si, and Mercury II™ 5800Si and 6800Si - that come with high speed serial word output.

The serial word interpolator always keeps track for users, unlike the analog or A- quad-B encoders that have to continuously transmit the data to the motion controller to maintain accurate position information. This means that the controller only needs to communicate with the encoder when it needs a position.

SPI Format

Motorola developed the Serial Peripheral Interface (SPI) format. This format is common and well recognized, and it is supported by several microprocessor peripheral chips. As its name suggests, it is not a protocol but an interface format, meaning it defines hardware connections without making any demands on the actual binary word format.

SPI is a master/slave arrangement. In this example, the controller and the encoder are master and slave, respectively. At its core, SPI stipulates four wires for basic communication - clock (SCLK), chip-select (CS), master-in/slave-out (MISO), and master-out/slave-in (MOSI).

The master drives the clock and provides the chip-select signal to trigger the peripheral’s ICs. In this case, the encoder does not receive data from the controller, so the MOSI line is removed.

M3000Si

For A-quad-B encoder speed, the principal limiting factor is how rapidly the A and B pulses can be transmitted. When sensor speed is high and/or the interpolation depth are high, the output frequency of the quadrature soon gets beyond the range of most motion controllers and quad-counters.

As these quad pulses never need to leave the interpolator, one is free to operate at the full bandwidth of the sensor head all the time. As most motor controllers are not off the shelf, accepting SPI format encoder outputs, users will require a custom design to communicate with the encoder system. However, the advantage in terms of speed and resolution will be significant.

The Mercury 3000Si data word is 36 bits long in SPI format, with 19.5 nm resolution (10 bits). SPI supports a maximum clock speed of 10 MHz. Factoring in the inherent timing delays, the encoder system can output a new 36 bit word every 4000 ns. This works out to a word rate of 250 kHz. The word is broken down into three discrete sections - 8 bits of status information, 10 bits of interpolation, and an 18 bit fringe counter.

Table 1. 36 bit data word

8 bit status 18 bit fringe counter 10 bits of interpolation (x1024)
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Naming the least important bit “0” can make it a bit difficult to follow things, but that is electrical engineers for you. Working from right to left, the initial 10 bits signify the position of the encoder within a single 20 µm fringe. 10 bits gives 1024 different combinations of zeros and ones, beginning with 0000000000 and ending with 1111111111.

Dividing 20 µm by 1024 gives 19.5 nm, which is the smallest increment of movement to be resolved by the encoder. The number of fringes moved by the encoder has to be tracked. This leads us to the fringe counter, the next part of the word. After reaching all ones, the interpolation section reverts back to all zeros and the fringe counter is incremented by one.

The fringe counter is 18 bits long, providing the ability to count up to 262,144. This many increments of 20 µm means that the measurement length can be tracked up to 5.24 m. The remaining 8 bits are known as the status word. Rather than a number, each bit acts as a flag to represent a specific event. Table 4 shows the significance of each bit.

Table 2. 36 bit data word

8 bit status 18 bit fringe counter 10 bits of interpolation (x1024)
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Table 3. Status word

Bit Name Description
28 redAlarm Normally 1, 0 if sensor signal low
29 yellowAlarm Normally 1, 0 if signal is near low
30 indexMode Normally 0, 1 if in Cal mode
31 indexWindow Normally 0, 1 if within IW
32-35 reserved

Table 4. 38 bit data word

8 bit status 18 bit fringe counter 12 bit interpolation (x4096)
37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
18 bit fringe counter 12 bit interpolation (x4096) 8 bit status

If an application needs less interpolation, fewer than 36 bits can be clocked out. As the MSB is sent first, if only 35 clock pulses are used they will omit bit 0 and obtain 9 bits of interpolation or x512. Omitting bits 1 and 0 yields 8 bit interpolation or x256 etc. However, this method does not have to be restricted to just the interpolation bits.

If less than 20 µm resolution is required, fringe counter bits can be ignored as well. While the M3000 quadrature encoder system enables users to choose any integer value between 4 and 1024 for their interpolation depth, the M3000Si encoder restricts users to binary steps (x4, x8, x16, x32, x64, x128, x256, x512, x1024).

The M3000Si encoder provides two different ways for the controller to request data:

  • The Standard approach
  • The Trigger approach

In the Standard approach, a simple chip-enable signal is used which is called n_spiEnable. When this typically high signal is asserted low, the clock (spiClock) signal toggles out the status and position word until n_spiEnable returns to a high signal. The ambiguity between the request and the real measurement is 208 ns.

The Trigger approach can be used if a measurement needs to be synchronized to an external event with greater precision. Using this separate signal known as spiTrigger, a measurement can be synchronized to within 20 ns of the request. However, the word will take the standard amount of time to be clocked out. The M3000Si User’s Manual provides a more comprehensive description of each approach with delay specifications and timing diagrams.

Index Modes

There is no index pulse output by the Si encoder system. Essentially, it does not serve any external purpose as the position is being generated by the interpolator, not the controller. However, this does not mean that the index is not essential. There still needs to be a reference position and the potential to zero the counter. The M3000Si and M3500Si encoders provide five different ways for the position word and index to interact.

  • No Index means that there is no interaction. Passing over the index mark does not make any changes to the position word. Though it must be noted that the status bits will still indicate when the sensor is within the index window as is the case in all index modes.
  • Upon first encounter, Mode 1 will zero the 18 bit fringe counter with the index mark following power-up. The interpolation bits will remain unchanged.
  • Every time the index mark is seen, Mode 2 will zero the fringe counter. Again, the interpolation bits will remain unchanged.
  • Just like Mode 1, Mode 3 will zero the fringe counter and will also subtract out the inter-fringe position of the index, making the output word all zeros (not including status). Internal to the encoder system, the interpolation bits cannot be zeroed since we cannot change where we are on the lissajous circle. A useful similarity is that while we can easily forget the number of mountains (fringes) we have climbed before, we cannot ignore where we are on the mountain we are presently climbing. As the index position can be anywhere within a single fringe, that number between 0 and 1024 has to be subtracted from the output to get all zeros.
  • Mode 4 behaves similar to Mode 2 with the index position subtracted out. Any of these modes can be programmed or factory set through the SmartSignal™ software. (Note: Mode 5 described in earlier manual versions was in error and is unavailable).

M3500Si

The Mercury 3500Si encoder system provides a 38 bit word with up to 4.88 nm resolution (12 bits) as well as several programmable options. Also, it supports a maximum clock speed of 20 MHz. Table 5 displays the data word broken down into its two different possible formats.

Table 5. 38 bit data word

Start Bits Position Word Status Bits CRC Word Stop Bits
1 0 1 1 4-35 Bits IW RL LL Y R S C Sp 0 6 Bits 5 2 1 0

As can be seen from Table 5, users can select whether the 8 bits of status will be at the end or beginning of the data word. If the status bits are not important in a specific application, then they can be positioned at the end of the data word and can be omitted by clocking out 8 fewer bits each time. This results in quicker transmission time and also a more economical use of memory in the controller.

Similar to the M3000Si, users can select between Trigger and Standard approaches to request data but this must be programmed ahead of time, because either of the request signal is received on the same connector pins. For specifics, users can refer to the M3500Si User’s Manual.

The provision of clock feed-back is another significant difference from the M3000Si encoder. The spiClockIn signal is looped back to the controller as an encoder output. This enables users to offset propagation delays between the encoder and the controller as both the data signals and clock can be sampled at the same physical point.

In both the encoder and controller, line drivers and receivers have inherent delays associated with them as well as the cable between them. Without clock feed-back, there may be a significant interval between requesting and receiving data based on the user’s cable length. The feed-back clock signal will be delayed the same amount as the data, making it easier to synchronize them to each other.

MII5800Si and MII6800Si

The interfaces in the Mercury II 5800Si and 6800Si encoders include up to 1.22 nm resolution (14 bits) with a user-defined length on the position word. The total data word can range from 27 to 58 bits based on the number of fringe-counter bits (range of travel) and inter-fringe bits (resolution) configured by the user. It supports clock speeds between 30 and 50 MHz. the data word format is shown in Table 6.

Table 6. Status bits

Status Bit ID Definition
IW Index Window Active when the sensor is over the optical index mark
RL Right Limit Active when the sensor is over the right limit marker
LL Left Limit Active when the sensor is over the left limit marker
Y Yellow Alarm Active during marginal alignment to the main track
R Red Alarm Active during poor or bad alignment to the main track
S Saturation Alarm Active if the main track signal is too large
C Communication Error Active if there is a communication error internal to the encoder
Sp Over-Speed Alarm Active if the encoder exceeds 10m/s (the speed alarm threshold)
Ø Reserved bit is always zero

The data word always starts with the same four start bits – 1011. This is followed by the position word, the 9 status bits, the cyclic redundancy check bits, and the stop bits – 1011. Table 7 shows the defined status bits. During standard operation, these bits will be all zeros and when not over the index mark or either of the two limit regions.

Table 7. 4 bit binary numbers

Binary Decimal
0000 0
0001 1
0010 2
0011 3
0100 4
0101 5
0110 6
0111 7
1000 8
1001 9
1010 10
1011 11
1100 12
1101 13
1110 14
1111 15

The CRC bits are a 6 bit polynomial equal to X6 + X + 1. Similar to the M3500Si encoder, the MII6800Si and MII5800Si offer clock feedback to the controller. The encoders can be set to reset the position to 0 each time the index is crossed (“Index Mode 1”), or to employ the position at power up as the 0 position (“Index Mode 0”).

Additionally, both encoders are available with Panasonic serial interface for integration with a Panasonic motor amplifier/controller. For more information and timing diagrams, users can refer the MII6800 or MII5800 series installation manuals.

Celera Motion

This information has been sourced, reviewed and adapted from materials provided by Celera Motion.

For more information on this source, please visit Celera Motion.

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