Kilopass Technology Inc., a leading provider of semiconductor logic non-volatile memory (NVM) intellectual property (IP), today announced that its XPM™ (eXtra Permanent Memory) IP is designed into a new integrated circuit for a micro electro mechanical systems (MEMS) accelerometer sensor targeting portable devices and tablets.
MaruLSI Ltd., a fabless semiconductor company based in Gyeonggi-do Province, South Korea, is designing the readout chip for MEMS sensors. XPM's ability to quickly trim at final test analog components that transform a MEMS sensor's analog signals into digital data made it attractive in this application. The ability of XPM NVM IP to be field programmed to offset analog component drift over time due to aging also made it well suited to the MEMS sensor application.
"MaruLSI is a leader in the design of sensor readout and analog-to-digital converters for a wide range of applications," said Jung Hyun Nam, Ph.D., president and CEO of MaruLSI. "When we evaluated different solutions for providing trim data for the A/D converter in the system-on-chip design we were building for our customer, we needed a proven solution, that could be implemented in 180nm standard logic CMOS at our foundry with a roadmap to smaller geometries and alternative foundries. Kilopass XPM IP met all these requirements."
"We are thrilled to be part of the MaruLSI chip design for the MEMS accelerometer sensor," said Linh Hong, vice president of marketing at Kilopass. "This application is ideally suited to our one-time programmable, antifuse, NVM IP technology, which has a track record for meeting the rigorous operating temperature and reliability standards for consumer designs. Our NVM IP is installed in 20 million set-top boxes, 50 million DVD chip sets, 100 million Wi-Fi modules, and 500 million FM tuners."
Antifuse NVM IP in Analog Mixed Signal
Antifuse NVM IP can be fabricated in standard logic CMOS at any process node 180nm and below and it can be programmed at test time or in the field. Thus, it is ideally suited to recover parametric yield loss due to process variation or design marginality or to trim circuit parameters that vary over time. For example, a design with a +/- 100 ppm clock frequency accuracy, which may not be achieved with silicon design can be fine tuned during ATE test using antifuse NVM IP; likewise for digital-to-analog and analog-to-digital converters that needs calibration for a target voltage range. For any analog function that can be digitally trimmed, antifuse NVM IP provides the ideal storage medium for these trim values.