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Sony to Increase Production Capacity for Stacked CMOS Image Sensors with 105 Billion Yen Investment

Sony Corporation (“Sony”) announces that it plans to invest in Sony Semiconductor Corporation (“Sony Semiconductor”) in the fiscal year ending March 31, 2016 (“FY15”) in order to increase its production capacity for stacked CMOS image sensors*1. Sony Semiconductor also plans to reorganize and optimize its production sites as it accelerates the shifting of resources to the image sensor business.

This investment is intended primarily to augment production facilities used in the mastering and layering processes*2 for stacked CMOS image sensors, specifically at Sony Semiconductor’s Nagasaki Technology Center (“Nagasaki TEC”), Yamagata Technology Center (“Yamagata TEC”), and Kumamoto Technology Center (“Kumamoto TEC”).

With this investment, Sony plans to increase total production capacity for image sensors from its current level of approximately 60,000 wafers per month to approximately 80,000 wafers per month*3 by the end of June, 2016. Previously, as a mid to long range target, Sony had aimed to raise its total production capacity for image sensors to approximately 75,000 wafers per month. To facilitate this increased production, Sony has continued to augment production facilities at each site, and it established Yamagata TEC in March 2014. Through this investment, Sony will exceed its previous target ahead of schedule.

The total investment amount is projected to be approximately 105 billion yen, comprising approximately 78 billion yen of investments in Nagasaki TEC, approximately 10 billion yen of investments in Yamagata TEC and approximately 17 billion yen of investments in Kumamoto TEC.

Stacked CMOS image sensors deliver superior image quality and advanced functionality in a compact size. Demand for these image sensors is anticipated to further increase, particularly within the expanding market for mobile devices such as smartphones and tablets. Sony is striving to bolster its production capacity for stacked CMOS image sensors and further strengthen its integrated supply operations in order to reinforce its leading position in the image sensor market.

Sony is also announcing the discontinuation of operations at Sony Semiconductor Oita Technology Center (“Oita TEC”), which is a base for the development and production of high-density semiconductors such as LSIs by the end of March 2016. Oita TEC began in 1984 as a production site for memory packaging, but in recent years its primary focus has shifted to the development and production of advanced packaging for LSIs used in game consoles. This decision to cease operations at Oita TEC was necessitated by the changing business landscape. Oita TEC’s approximately 220 employees are scheduled to be transferred to other sites engaged in the production of image sensors or to other Sony Semiconductor sites that will take over some of the operations of Oita TEC.

*1: CMOS image sensors in a stacked structure that layer the pixel section containing back-illuminated structure pixels onto semiconductor chips containing the circuit for signal processing, in contrast to the supporting substrates used in conventional back-illuminated CMOS image sensors.
*2: The mastering process refers to the manufacture of photodiodes and wiring processes for stacked CMOS image sensors. The layering process refers to the layering of semiconductor chips containing back-illuminated structure pixels on top of semiconductor chips containing the circuit for signal processing.
*3: This total production capacity (300mm wafer basis) includes the output of foundry operations to which Sony outsources a part of the manufacturing process. For the purposes of calculating total production capacity, the capacity of 200mm wafer production lines at the Kagoshima Technology Center and Nagasaki TEC are converted into equivalent amounts in terms of 300mm wafer production.

Source: http://www.sony.co.jp/

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